Conventionally, a build-up wiring substrate is known as a wiring substrate used for a semiconductor package and the like. Japanese Laid-Open Patent Publication No. 2003-023252 and Japanese Laid-Open Patent Publication No. 2003-023253 describe conventional examples of a build-up wiring substrate. In these patent publications, a wiring layer and an insulation layer are stacked on each of upper and lower surfaces of a core substrate to increase the density of wiring patterns.
In recent years, electronic components, such as a semiconductor chip mounted on a build-up wiring substrate, are further increased in density while being reduced in size. The build-up wiring substrate needs denser and finer wiring patterns and smaller and thinner wiring substrates.